The present invention relates to a thin film transistor (TFT) array substrate which constitutes a display unit in combination with, for example, liquid crystal.
In recent years, as a display unit for a work station, there is strong demand for a liquid crystal display employing the TFT array substrate, which is larger in size and has larger capacity. Thus, the TFT array substrate is also required to have larger area and larger capacity. In case a gate wiring made of Cr or Ta employed in the known small TFT array substrate is used in a TFT array substrate having a large area, resistance of the gate wiring becomes extremely large, so that a gate pulse signal inputted from a drive IC is attenuated at a terminal of the gate wiring and thus, uniform display performance cannot be obtained in the liquid crystal display. Therefore, in the TFT array substrate having a large area and a large capacity, aluminum (Al) having a low resistance has been generally used as material for the gate wiring.
Meanwhile, much attention is recently focused on a gate insulating film obtained by anodic oxidation of metals such as Al, Ta, Ta-Mo alloy, etc. forming the gate wiring. The insulating film formed by anodic oxidation has such a feature that an insulating film having less defects can be produced more easily than those produced by conventional chemical vapor deposition (CVD), sputtering, etc.
FIGS. 1 and 2 show a known TFT array substrate employing the gate insulating film formed by anodic oxidation and acting as an active matrix substrate. In the known TFT array substrate, FIGS. 1(a), 1(b) and 2(a) show a TFT, a pixel electrode 6 and an auxiliary capacity portion 7 for holding a signal supplied to the pixel electrode 6, while FIGS. 1(c) and 2(b) show a drive IC mounting portion 8 provided at an end of a gate wiring 1. In order to produce the known TFT array substrate of FIGS. 1 and 2, the gate wiring 1 is initially formed on a substrate by anodic oxidation using one of metals such as Al, Ta, Ta-Mo alloy, etc. Subsequently, a pattern of an organic film such as a resist is formed at an area which is not subjected to anodic oxidation. In this state, the substrate is dipped in electrolyte such as oxalic acid such that the short-circuited pixel electrode 6 and an electrode of Pt are connected to an anode and a cathode, respectively. Thereafter, electrolysis is performed by applying a voltage of about 100 V to the substrate so as to generate oxygen such that the wiring metal is oxidized. As a result, an anodic oxidation film 2 is formed on the gate wiring 1 except for the resist pattern. Subsequently, the resist pattern is removed and a silicon nitride film 3 is formed by CVD. Thereafter, an i-type semiconductor film 4 constituting the TFT is formed at proper locations on the silicon nitride film 3 which is formed on the gate electrode 1 and the anodic oxidation film 2.
Then, the auxiliary capacity portion 7 is formed between the pixel electrode 6 and the gate wiring 1 by an indium-tin-oxide (ITO) film 5 which is a transparent and electrically conductive film. At this time, the drive IC mounting portion 8 for supplying a gate pulse signal from the drive IC to the gate wiring 1 is also formed by the ITO film 5 simultaneously. The drive IC mounting portion 8 is formed by the ITO film 5 on the ground that since the ITO film 5 has more stable surface state than other electrically conductive films, excellent connection between the drive IC mounting portion 8 and and the drive IC can be obtained. Furthermore, a source drain electrode 9 is formed in a shape of matrix relative to the gate wiring 1 and is connected to the pixel electrode 6 through the TFT 4 and a pattern 9a.
Meanwhile, the drive IC mounting portion 8 is disposed at the end of the gate wiring 1. In the drive IC mounting portion 8, if the ITO film 5 is connected to the gate wiring 1 via a contact hole 3a formed in the silicon nitride film 3, material of the gate wiring 1 is oxidized at the time of formation of the ITO film 5. As a result, resistance of contact between the ITO film 5 and the gate wiring 1 is increased and thus, such a problem arises that a high-frequency signal inputted from the drive IC is distorted. In order to solve this problem, such a countermeasure has been employed in which a Cr pattern 11 is formed under the gate wiring 1 so as to be partially connected to the gate wiring 1 and the ITO film 5 is connected to the silicon nitride film 3 on the Cr pattern 11 through the contact hole 3a. In this countermeasure, since the gate wiring 1 is connected to the ITO film 5 by way of the Cr pattern 11, excellent connection therebetween is obtained.
The known TFT array substrate of the above described arrangement has the following drawbacks. Firstly, in order to obtain excellent contact between the gate wiring 1 and the ITO film 5, a pattern of another metal such as Cr is required to be provided. Hence, additional processes of forming and patterning the Cr film should be performed, so that production processes for the TFT array substrate are increased in number, thereby resulting in rise of its production cost. Secondly, in the case where the gate wiring is made of aluminum (Al), so-called "hillock", i.e. local projective crystal growth occurs in the Al pattern during a heat treatment process in photolithography. If this hillock becomes so large as not to be covered by the silicon nitride film 3, etchant such as aqueous solution of hydrogen chloride or aqueous solution of ferric chloride and hydrogen chloride penetrates into the gate wiring 1 through the hillock so as to dissolve Al, thereby resulting in disconnection of the gate wiring 1.